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20 to 40MHz master clock frequency (fundamental) |
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Output frequency ranges |
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100 to 166.6MHz (VDD = VDDQ = 3.0 to 3.6V) |
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100 to 125MHz (VDD = VDDQ = 2.7 to 3.6V) |
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8mA output drive capability |
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Oscillator capacitors (CG, CD) and feedback resistor (Rf) built-in
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100ps (typ) low jitter output (peak-peak, CL = 15pF) |
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2 program inputs for 4 selectable multiplier ratios |
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Standby function |
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2.7 to 3.6V operating supply voltage |
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Package:VSOP-8-031044-1, Chip form |